MAX7032EVSYS-433【PDF 15/32 页】EVAL KIT MAX7032

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Low-Cost, Crystal-Based, Programmable,

ASK/FSK Transceiver with Fractional-N PLL

The configuration shown in Figure 2 can create a

Butterworth or Bessel response. The Butterworth filter

offers a very flat amplitude response in the passband

and a rolloff rate of 40dB/decade for the two-pole filter.

The Bessel filter has a linear phase response, which

works well for filtering digital data. To calculate the

value of the capacitors, use the following equations,

along with the coefficients in Table 1:

MAX7032

100k Ω

RSSI OR

FSK DEMOD

100k Ω

C F 1 =

b

a ( 100 k Ω )( π )( f C )

DS+

C F2

OP+

DF

C F1

C F 2 =

a

4 ( 100 k Ω )( π )( f C )

Figure 2. Sallen-Key Lowpass Data Filter

where f C is the desired 3dB corner frequency.

For example, choose a Butterworth filter response with

a corner frequency of 5kHz:

MAX7032

1 . 000

C F 1 = ≈ 450 pF

( 1 . 414 )( 100 k Ω )( 3 . 14 )( 5 kHz )

1 . 414

C F 2 = ≈ 225 pF

( 4 )( 100 k Ω )( 3 . 14 )( 5 kHz )

DATA

SLICER

Choosing standard capacitor values changes C F1 to

DATA

DS-

R

DS+

470pF and C F2 to 220pF. In the Typical Application Circuit,

C F1 and C F2 are named C16 and C17, respectively.

Data Slicer

The data slicer takes the analog output of the data filter

and converts it to a digital signal. This is achieved by

using a comparator and comparing the analog input to

a threshold voltage. The threshold voltage is set by the

voltage on the DS- pin, which is connected to the nega-

tive input of the data-slicer comparator.

Numerous configurations can be used to generate the

data-slicer threshold. For example, the circuit in Figure

3 shows a simple method using only one resistor and

one capacitor. This configuration averages the analog

output of the filter and sets the threshold to approxi-

mately 50% of that amplitude. With this configuration,

the threshold automatically adjusts as the analog signal

varies, minimizing the possibility for errors in the digital

data. The values of R and C affect how fast the thresh-

old tracks the analog amplitude. Be sure to keep the

corner frequency of the RC circuit much lower (about

10 times) than the lowest expected data rate.

With this configuration, a long string of NRZ zeros or ones

can cause the threshold to drift. This configuration works

C

Figure 3. Generating Data Slicer Threshold Using a Lowpass

Filter

best if a coding scheme, such as Manchester coding,

which has an equal number of zeros and ones, is used.

Figure 4 shows a configuration that uses the positive and

negative peak detectors to generate the threshold. This

configuration sets the threshold to the midpoint between

a high output and a low output of the data filter.

Peak Detectors

The maximum peak detector (PDMAX) and minimum

peak detector (PDMIN), with resistors and capacitors

shown in Figure 4, create DC output voltages equal to

the high and low peak values of the filtered ASK or FSK

demodulated signals. The resistors provide a path for

the capacitors to discharge, allowing the peak detec-

tors to dynamically follow peak changes of the data fil-

ter output voltages.

______________________________________________________________________________________

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